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Low Power Simple Accuracy Reconfigurable Adder for DCT Schemes


H. Vijay Kumar and W. Yasmeen
Abstract

Approximate computing is a promising methodology for low-control IC structure and has as recently acquired significant research consideration. To oblige dynamic levels of estimation, a couple of Accuracy configurable adder (ACA) plans have been created previously. In any case, these plans will in general bring about substantial region overheads as they depend on either repetitive processing or complicated carry prediction. A portion of these structures incorporate error recognition and correction, which further increase in area. In this, a basic ACA structure that contains no error detection/correction circuitry and uses exceptionally basic carry prediction. The design rules the most recent past work on precision delay-control trade-off utilizing lower area. In this, the iso-delay power of our design is of accurate adder regardless of degradation in accuracy. One variation of this structure gives better grained and larger tenability than that of the past works. In addition, the propose delay adaptive self-configuration technique to additionally improve the precision delay-control trade-off. The upsides of this technique are affirmed by the applications in augmentation and discrete cosine changes processing.

Volume 11 | 06-Special Issue

Pages: 1235-1242