The Serial Peripheral Interface bus or SPI bus is a synchronous serial data that operates in full duplex mode. Devices communicate in master/slave mode where master device initiates the data frame. Slave select lines are allowed to select the slave devices. The main objective of this project is to design SPI verilog and verify the code and functionality using systemverilog. SPI can be simulated using Questa Sim 10.0b tool and symmetrical structure can be synthesized using XILINX ISE 14.7. Sometimes SPI called a four-wire serial bus. SPI is often referred to as Synchronous Serial Interface. SPI are used to provide board level interfaces.
Volume 11 | 09-Special Issue
Pages: 313-318
DOI: 10.5373/JARDCS/V11/20192573