Radix-4 Feed Back Design Using Four Parallel Adders with Efficient Reordering Module for Fast Fourier Transform

Prasanna Kumar Godi, Krishna T Battula and Pushpa Kotipalli

A new delay and feedback design for Fast Fourier Transform design with efficient reordering modules for outputs is proposed in this paper, it is designed based on radix-4 four parallel complex adders. The proposed design has eight parallel adders for computing four outputs simultaneously, multiplier unit for twiddle factor multiplication and memory unit to store the running data. The proposed design has novel data flow, proper reordering of outputs at each stage is achieved by using Parallel in Parallel Out (PIPO) buffers. This is the simple radix-4 architecture using one four parallel processing unit. The flow of data is controlled by control unit. The comparison of proposed method with previous standard methods shows that the proposed method generates FFT by using reduced storage, limited complex adder and multipliers.

Volume 12 | Issue 3

Pages: 593-598

DOI: 10.5373/JARDCS/V12I3/20201228