SHE-PWM Cascaded Ml Inverters Structure with Fault Tolerance Over Open Circuit Faults

T. Daniel Raj, Asif L. Jamadar and Amol A. Suryawanshi

With the consideration of DC link voltages controllable in case of cascaded multilevel inverter, the technique SHE-PWM is implemented in this paper. Many industrial applications have concern over multilevel inverter performance. The conditions will be abnormal when a fault occurs in one of the switches in the case of conventional multilevel inverters. Other equipments may also be damaged. Faulty inverter must be removed in such cases. An efficient topology with fault-tolerant capability is illustrated in this paper. With respect to DC connections of variable voltage, proposed method is the mathematical modeling method used by SHE-PWM. Suppose an open-circuit fault occur in any one switch, with basis of the proposed switchover technique, the newly given topology clarifies the failure. Furthermore, the extended form of the proposed structure is provided in order to decrease total harmonic distortion; On the other hand, at minimum value for different operating points, the total harmonic distortion of the output voltage waveform remains constant. The fault tolerance strategy is true and an effective clearance of fault is followed on the switches through output voltage levels. Suitable experimental and simulation tests verify the process on the 81-level model of the proposed multilevel inverter and the strategy of fault tolerance which was proposed. MATLAB / SIMULINK software implementation of proposed topology that uses the simple frequency-switching method allows the power switches to regulate the voltage levels generated at the output.

Volume 12 | 01-Special Issue

Pages: 348-358

DOI: 10.5373/JARDCS/V12SP1/20201081