Hybrid Full Adder Architecture Of Swing Dependent Based Xor-Xnor Gates

A.Dinesh Reddy, V.Venkata Sainath, M.Venkata Narendra, K Hari Kishore Fazal Noorbasha, E Raghuveera, Shaik Razia

As the integration scale grows, greater power consumption and area consumption limit the usefulness of the circuit. The market for mobile telephones, tablets and laptops battery-powered devices has risen. Two suggested total adder structures using XOR-XNOR gates are introduced in this article. The optimization of these circuits is due to the low output capacity of the adder and its power consumption and delay. Compared to other conventional full adder structures, the proposed full adder structures consume 0.32μW and 0.34μW respectively of power, which are small. These complete additives not only achieve low power and high speed but also provide complete swing with fewer transistors. Tanner Tools are used to test the performance of the circuits. This simulation is based on 25 nm technology.

Volume 12 | Issue 2

Pages: 1093-1100

DOI: 10.5373/JARDCS/V12I2/S20201140