Implementation of 4-bit Ripple Carry Adder by Adopting Sub threshold Adiabatic Logic for Ultralow-Power Application

K.Divya Madhuri, K Hari Kishore

Adiabatic logic reduces dynamic power consumption significantly without sacrificing noise immunity and driving ability. Design and analysis of SAL-based 4-bit RCA with SAL (Sub-threshold Adiabatic logic) based standard cell library consisting of common digital gates, such as buffer/inverter, two-input and three-input functions, complex gates, and special circuits like half and full adder, which are necessary to implement the 4- bit RCA with 130 nm technology. Power gain, voltage swings, delays are to be determined using Mentor graphics tool is the objective of this work.

Volume 12 | Issue 6

Pages: 11-17

DOI: 10.5373/JARDCS/V12I6/S20201002