CNTFET Based 16-Bit ALU Design with Sleepy Keeper and SVL Low Power Technique Operating at 15 GHz

*Y.Maheswar, B. L. Raju,K. Soundara Rajan


The 16-bit ALU is designed using short gate CNTFET’s. It performs 13 operations, out of which 4 are arithmetic, 6 logical and 3 shift/rotate operations. 16-bit ALU has been designed using adder and 2:1 multiplexors with S1, S2 and S3 as control signals. Different types of 1-bit full adders has been designed using CNTFET technology at 20nmand compared delay, power consumption, drain current output voltage swing of the adders and the optimum adder is transmission based full adder with power consumption of 2.53 nW and delay of 20.14ns. The transmission based full adder consumes less power, lesser delay and PDP and produces full output voltage level. The adder performs both signed and unsigned addition and subtraction. The entire ALU design is designed using HSPICE simulator in 20nm technology. The operating voltage is 0.9V. The power consumption of ALU in 45nm and 20nm is 29mW and 1183nW respectively. Delay of ALU in 20nm and 45nm technology is 7.4ns and8.91ns respectively. The maximum operating frequency of 16-bit ALU is 0.15GHz. Different leakage power reduction techniques have been implemented on ALU to reduce leakage power. Fine grain and sleepy keeper techniques reduce power by 50%, whereas with SVL the leakage power consumption increases.

Issue: 09-Special Issue

Year: 2018

Pages: 2612-2619

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